199 search results - page 29 / 40 » A Hardware Algorithm for Integer Division |
PAIRING
2007
Springer
14 years 2 months ago
2007
Springer
A series of recent algorithmic advances has delivered highly effective methods for pairing evaluation and parameter generation. However, the resulting multitude of options means m...
CODES
2006
IEEE
14 years 2 months ago
2006
IEEE
In this paper, we present a methodology for designing a pipeline of accelerators for an application. The application is modeled using sequential C language with simple stylization...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
ASAP
2004
IEEE
14 years 10 days ago
2004
IEEE
We describe a general-purpose processor architecture for accelerating public-key computations on server systems that demand high performance and flexibility to accommodate large n...
GLOBECOM
2008
IEEE
14 years 3 months ago
2008
IEEE
— Time-interleaved (TI) analog-to-digital converters (ADCs) are a promising architecture for realizing the highspeed ADCs required to implement “mostly digital” receivers for...