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» A Hardware Implementation of Layer 2 MPLS
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VTC
2010
IEEE
159views Communications» more  VTC 2010»
13 years 5 months ago
Architectural Analysis of a Smart DMA Controller for Protocol Stack Acceleration in LTE Terminals
—In this paper we present an architectural analysis of a smart DMA (sDMA) controller for protocol stack acceleration in mobile devices supporting 3GPP’s Long Term Evolution (LT...
Sebastian Hessel, David Szczesny, Felix Bruns, Att...
DATE
2009
IEEE
183views Hardware» more  DATE 2009»
14 years 2 months ago
SunFloor 3D: A tool for Networks On Chip topology synthesis for 3D systems on chips
Three-dimensional integrated circuits are a promising approach to address the integration challenges faced by current Systems on Chips (SoCs). Designing an efficient Network on C...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini...
CCR
2011
13 years 2 months ago
Papyrus: a software platform for distributed dynamic spectrum sharing using SDRs
Proliferation and innovation of wireless technologies require significant amounts of radio spectrum. Recent policy reforms by the FCC are paving the way by freeing up spectrum fo...
Lei Yang, Zengbin Zhang, Wei Hou, Ben Y. Zhao, Hai...
JVM
2004
132views Education» more  JVM 2004»
13 years 9 months ago
Solaris Zones: Operating System Support for Server Consolidation
e a new operating system abstraction for partitioning systems, allowing multiple applications to run in isolation from each other on the same physical hardware. This isolation prev...
Andrew Tucker, David Comay
PDP
2009
IEEE
14 years 2 months ago
High Throughput Intra-Node MPI Communication with Open-MX
Abstract—The increasing number of cores per node in highperformance computing requires an efficient intra-node MPI communication subsystem. Most existing MPI implementations rel...
Brice Goglin