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CC
2000
Springer
134views System Software» more  CC 2000»
15 years 6 months ago
Pipelined Java Virtual Machine Interpreters
The performance of a Java Virtual Machine (JVM) interpreter running on a very long instruction word (VLIW) processor can be improved by means of pipelining. While one bytecode is i...
Jan Hoogerbrugge, Lex Augusteijn
ISCA
2007
IEEE
149views Hardware» more  ISCA 2007»
16 years 14 days ago
Virtual private caches
Virtual Private Machines (VPM) provide a framework for Quality of Service (QoS) in CMP-based computer systems. VPMs incorporate microarchitecture mechanisms that allow shares of h...
Kyle J. Nesbit, James Laudon, James E. Smith
FPGA
2010
ACM
276views FPGA» more  FPGA 2010»
16 years 3 months ago
Accelerating Monte Carlo based SSTA using FPGA
Monte Carlo based SSTA serves as the golden standard against alternative SSTA algorithms, but it is seldom used in practice due to its high computation time. In this paper, we acc...
Jason Cong, Karthik Gururaj, Wei Jiang, Bin Liu, K...
ISCA
1997
IEEE
96views Hardware» more  ISCA 1997»
15 years 10 months ago
DataScalar Architectures
DataScalar architectures improve memory system performance by running computation redundantly across multiple processors, which are each tightly coupled with an associated memory....
Doug Burger, Stefanos Kaxiras, James R. Goodman
SIGMETRICS
1994
ACM
113views Hardware» more  SIGMETRICS 1994»
15 years 10 months ago
Shade: A Fast Instruction-Set Simulator for Execution Profiling
Shade is an instruction-set simulator and custom trace generator. Application programs are executed and traced under the control of a user-supplied trace analyzer. To reduce commu...
Robert F. Cmelik, David Keppel