Sciweavers

1998 search results - page 322 / 400
» A Hardware Implementation of PRAM and Its Performance Evalua...
Sort
View
IOLTS
2005
IEEE
125views Hardware» more  IOLTS 2005»
14 years 3 months ago
Design of a Self Checking Reed Solomon Encoder
— In this paper, an innovative self-checking Reed Solomon encoder architecture is described. The presented architecture exploits some properties of the arithmetic operations in G...
Gian-Carlo Cardarilli, Salvatore Pontarelli, Marco...
CCS
2010
ACM
13 years 10 months ago
Security analysis of India's electronic voting machines
Elections in India are conducted almost exclusively using electronic voting machines developed over the past two decades by a pair of government-owned companies. These devices, kn...
Scott Wolchok, Eric Wustrow, J. Alex Halderman, Ha...
CN
2002
77views more  CN 2002»
13 years 10 months ago
Architecture of a Web server accelerator
We describe the design, implementation and performance of a high-performance Web server accelerator which runs on an embedded operating system and improves Web server performance ...
Junehwa Song, Arun Iyengar, Eric Levy-Abegnoli, Da...
CDC
2008
IEEE
128views Control Systems» more  CDC 2008»
14 years 4 months ago
Time-robust discrete control over networked Loosely Time-Triggered Architectures
In this paper we consider Loosely Time-Triggered Architectures (LTTA) as a networked infrastructure for deploying discrete control. LTTA are distributed architectures in which 1/ ...
Paul Caspi, Albert Benveniste
EMSOFT
2007
Springer
14 years 4 months ago
Loosely time-triggered architectures based on communication-by-sampling
We address the problem of mapping a set of processes which communicate synchronously on a distributed platform. The Time Triggered Architecture (TTA) proposed by Kopetz for the co...
Albert Benveniste, Paul Caspi, Marco Di Natale, Cl...