Sciweavers

1998 search results - page 353 / 400
» A Hardware Implementation of PRAM and Its Performance Evalua...
Sort
View
SIGMETRICS
2004
ACM
135views Hardware» more  SIGMETRICS 2004»
14 years 2 months ago
Multi-dimensional storage virtualization
Most state-of-the-art commercial storage virtualization systems focus only on one particular storage attribute, capacity. This paper describes the design, implementation and evalu...
Lan Huang, Gang Peng, Tzi-cker Chiueh
JSW
2007
102views more  JSW 2007»
13 years 9 months ago
A Novel Framework for Building Distributed Data Acquisition and Monitoring Systems
— We propose a novel framework for building a distributed data acquisition and monitoring system. Our novel framework is mainly based on XML leverages and OPC (Openness, Producti...
Vu Van Tan, Dae-Seung Yoo, Myeong-Jae Yi
CODES
2009
IEEE
14 years 3 months ago
Using binary translation in event driven simulation for fast and flexible MPSoC simulation
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
Marius Gligor, Nicolas Fournel, Frédé...
ISCA
2002
IEEE
105views Hardware» more  ISCA 2002»
14 years 2 months ago
Tarantula: A Vector Extension to the Alpha Architecture
Tarantula is an aggressive floating point machine targeted at technical, scientific and bioinformatics workloads, originally planned as a follow-on candidate to the EV8 processo...
Roger Espasa, Federico Ardanaz, Julio Gago, Roger ...
DSD
2010
IEEE
144views Hardware» more  DSD 2010»
13 years 9 months ago
On-chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
Xiao Zhang, Hans G. Kerkhoff, Bart Vermeulen