1998 search results - page 69 / 400 » A Hardware Implementation of PRAM and Its Performance Evalua... |
UM
2007
Springer
14 years 3 months ago
2007
Springer
Despite the growing popularity of user modeling servers, little attention has been paid to optimizing and evaluating the performance of these servers. We argue that implementation ...
HICSS
1994
IEEE
14 years 1 months ago
1994
IEEE
Shared memory architectures often have caches to reduce the number of slow remote memory accesses. The largest possible caches exist in shared memory architectures called Cache-On...
MASCOTS
2004
13 years 10 months ago
2004
This paper describes the design and implementation of our high speed simulator for out-of-order microprocessors named BurstScalar. The simulator is based on the wellknown SimpleSc...
INFOCOM
2011
IEEE
13 years 16 days ago
2011
IEEE
Abstract—By ‘optimal CSMA’ we denote a promising approach to maximize throughput-based utility in wireless networks without message passing or synchronization among nodes. De...
LCN
2008
IEEE
14 years 3 months ago
2008
IEEE
— IP traffic measurements form the basis of several network management tasks, such as accounting, planning, intrusion detection, and charging. High-speed network links challenge ...