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» A High Performance Kernel-Less Operating System Architecture
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ICS
2009
Tsinghua U.
14 years 2 months ago
Performance modeling and automatic ghost zone optimization for iterative stencil loops on GPUs
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
Jiayuan Meng, Kevin Skadron
IISWC
2009
IEEE
14 years 2 months ago
Understanding PARSEC performance on contemporary CMPs
PARSEC is a reference application suite used in industry and academia to assess new Chip Multiprocessor (CMP) designs. No investigation to date has profiled PARSEC on real hardwa...
Major Bhadauria, Vincent M. Weaver, Sally A. McKee
ACSD
2003
IEEE
95views Hardware» more  ACSD 2003»
14 years 1 months ago
Quasi-Static Scheduling for Concurrent Architectures
This paper presents a synthesis approach for reactive systems that aims at minimizing the overhead introduced by the operating system and the interaction among the concurrent task...
Jordi Cortadella, Alex Kondratyev, Luciano Lavagno...
EUROSYS
2007
ACM
14 years 5 months ago
Sealing OS processes to improve dependability and safety
In most modern operating systems, a process is a -protected abstraction for isolating code and data. This protection, however, is selective. Many common mechanisms—dynamic code ...
Galen C. Hunt, Mark Aiken, Manuel Fähndrich, ...
ICCAD
2001
IEEE
143views Hardware» more  ICCAD 2001»
14 years 5 months ago
Transient Power Management Through High Level Synthesis
The use of nanometer technologies is making it increasingly important to consider transient characteristics of a circuit’s power dissipation (e.g., peak power, and power gradien...
Vijay Raghunathan, Srivaths Ravi, Anand Raghunatha...