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» A High Performance Kernel-Less Operating System Architecture
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120
Voted
ISCA
2008
IEEE
188views Hardware» more  ISCA 2008»
15 years 9 months ago
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
Dongkook Park, Soumya Eachempati, Reetuparna Das, ...
162
Voted
TREC
2007
15 years 3 months ago
Exegy at TREC 2007 Million Query Track
Exegy’s submission for the TREC 2007 million query track consisted of results obtained by running the queries against the raw data, i.e., the data was not indexed. The hardwarea...
Naveen Singla, Ronald S. Indeck
147
Voted
CIKM
2010
Springer
15 years 20 days ago
Adaptive query execution for data management in the cloud
A major component of many cloud services is query processing on data stored in the underlying cloud cluster. The traditional techniques for query processing on a cluster are those...
Adrian Daniel Popescu, Debabrata Dash, Verena Kant...
129
Voted
VEE
2009
ACM
107views Virtualization» more  VEE 2009»
15 years 9 months ago
Architectural support for shadow memory in multiprocessors
Runtime monitoring support serves as a foundation for the important tasks of providing security, performing debugging, and improving performance of applications. Often runtime mon...
Vijay Nagarajan, Rajiv Gupta
99
Voted
IWCMC
2010
ACM
15 years 7 months ago
Turbo packet combining techniques for multi-relay-assisted systems over multi-antenna broadband channels
This paper focuses on turbo packet combining techniques for multi-relay-assisted systems operating over multiple-input multiple-output (MIMO) broadband channel. Two packet combini...
Houda Chafnaji, Halim Yanikomeroglu, Tarik Ait-Idi...