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IESS
2007
Springer
156views Hardware» more  IESS 2007»
14 years 2 months ago
Automatic Data Path Generation from C code for Custom Processors
The stringent performance constraints and short time to market of modern digital systems require automatic methods for design of high performance applicationspeciļ¬c architectures...
Jelena Trajkovic, Daniel Gajski
FPL
2005
Springer
103views Hardware» more  FPL 2005»
14 years 2 months ago
Low Power Domain-Specific Reconfigurable Array for Discrete Wavelet Transforms Targeting Multimedia Applications
Domain-specific heterogeneous reconfigurable arrays provide high performance over generic Field Programmable Gate Arrays (FPGAs) while maintaining the flexibility for that particu...
Sajid Baloch, Imran Ahmed, Tughrul Arslan, Adrian ...
APCSAC
2003
IEEE
14 years 1 months ago
Arithmetic Circuits Combining Residue and Signed-Digit Representations
This paper discusses the use of signed-digit representations in the implementation of fast and efficient residue-arithmetic units. Improvements to existing signed-digit modulo adde...
Anders Lindström, Michael Nordseth, Lars Beng...
FCCM
2009
IEEE
316views VLSI» more  FCCM 2009»
14 years 15 days ago
An FPGA Implementation for Solving Least Square Problem
This paper proposes a high performance least square solver on FPGAs using the Cholesky decomposition method. Our design can be realized by iteratively adopting a single triangular...
Depeng Yang, Gregory D. Peterson, Husheng Li, Junq...
DAC
2009
ACM
14 years 15 days ago
RegPlace: a high quality open-source placement framework for structured ASICs
Structured ASICs have recently emerged as an exciting alternative to ASIC or FPGA design style as they provide a new trade-off between the high performance of ASIC design and low ...
Ashutosh Chakraborty, Anurag Kumar, David Z. Pan