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ISCAS
2003
IEEE
114views Hardware» more  ISCAS 2003»
14 years 22 days ago
On the hardware implementations of the SHA-2 (256, 384, 512) hash functions
Couple to the communications wired and unwired networks growth, is the increasing demand for strong secure data transmission. New cryptographic standards are developed, and new en...
Nicolas Sklavos, Odysseas G. Koufopavlou
ISSS
1997
IEEE
83views Hardware» more  ISSS 1997»
13 years 11 months ago
A Scheduling and Pipelining Algorithm for Hardware/Software Systems
Given a hardware/software partitioned specification and an allocation (number and type) of processors, we present an algorithm to (1) map each of the software behaviors (or tasks...
Smita Bakshi, Daniel Gajski
INTEGRATION
2007
98views more  INTEGRATION 2007»
13 years 7 months ago
Hashchip: A shared-resource multi-hash function processor architecture on FPGA
The ubiquitous presence of mobile devices and the demand for better performance and efficiency have motivated research into embedded implementations of cryptography algorithms. I...
T. S. Ganesh, Michael T. Frederick, T. S. B. Sudar...
HPCA
2003
IEEE
14 years 7 months ago
Caches and Hash Trees for Efficient Memory Integrity
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications s...
Blaise Gassend, G. Edward Suh, Dwaine E. Clarke, M...
GECCO
2007
Springer
209views Optimization» more  GECCO 2007»
13 years 11 months ago
Hardware acceleration of multi-deme genetic algorithm for the application of DNA codeword searching
A large and reliable DNA codeword library is key to the success of DNA based computing. Searching for sets of reliable DNA codewords is an NP-hard problem, which can take days on ...
Qinru Qiu, Daniel J. Burns, Prakash Mukre, Qing Wu