Sciweavers

486 search results - page 69 / 98
» A Hybrid Hardware and Software Component Architecture for Em...
Sort
View
CODES
2006
IEEE
14 years 1 months ago
Yield prediction for architecture exploration in nanometer technology nodes: : a model and case study for memory organizations
Process variability has a detrimental impact on the performance of memories and other system components, which can lead to parametric yield loss at the system level due to timing ...
Antonis Papanikolaou, T. Grabner, Miguel Miranda, ...
SIES
2008
IEEE
14 years 2 months ago
Performance evaluation of a java chip-multiprocessor
—Chip multiprocessing design is an emerging trend for embedded systems. In this paper, we introduce a Java multiprocessor system-on-chip called JopCMP. It is a symmetric shared-m...
Christof Pitter, Martin Schoeberl
MOBIQUITOUS
2007
IEEE
14 years 1 months ago
Battery-Aware Embedded GPS Receiver Node
—This paper discusses the design and implementation of an ultra low power embedded GPS receiver node for use in remote monitoring situations where battery life is of the utmost i...
Dejan Raskovic, David Giessel
DAC
2002
ACM
14 years 8 months ago
A fast on-chip profiler memory
Profiling an application executing on a microprocessor is part of the solution to numerous software and hardware optimization and design automation problems. Most current profilin...
Roman L. Lysecky, Susan Cotterell, Frank Vahid
ARCS
2004
Springer
14 years 1 months ago
Cryptonite - A Programmable Crypto Processor Architecture for High-Bandwidth Applications
Cryptographic methods are widely used within networking and digital rights management. Numerous algorithms exist, e.g. spanning VPNs or distributing sensitive data over a shared ne...
Rainer Buchty, Nevin Heintze, Dino Oliva