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» A Hybrid Memory Sub-system for Video Coding Applications
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SIGCOMM
2010
ACM
13 years 7 months ago
On the forwarding capability of mobile handhelds for video streaming over MANETs
Despite the importance of real-world experiments, nearly all ongoing research activities addressing video streaming over MANETs are based on simulation studies. Earlier research s...
Stein Kristiansen, Morten Lindeberg, Daniel Rodr&i...
SIGMETRICS
2008
ACM
13 years 7 months ago
DRAM is plenty fast for wirespeed statistics counting
Per-flow network measurement at Internet backbone links requires the efficient maintanence of large arrays of statistics counters at very high speeds (e.g. 40 Gb/s). The prevailin...
Bill Lin, Jun (Jim) Xu
DAC
2007
ACM
14 years 8 months ago
Program Mapping onto Network Processors by Recursive Bipartitioning and Refining
Mapping packet processing applications onto embedded network processors (NP) is a challenging task due to the unique constraints of NP systems and the characteristics of network a...
Jia Yu, Jingnan Yao, Jun Yang 0002, Laxmi N. Bhuya...
ICS
2007
Tsinghua U.
14 years 1 months ago
Scheduling FFT computation on SMP and multicore systems
Increased complexity of memory systems to ameliorate the gap between the speed of processors and memory has made it increasingly harder for compilers to optimize an arbitrary code...
Ayaz Ali, S. Lennart Johnsson, Jaspal Subhlok
DFT
1999
IEEE
114views VLSI» more  DFT 1999»
13 years 12 months ago
Yield Enhancement Considerations for a Single-Chip Multiprocessor System with Embedded DRAM
A programmable single-chip multiprocessor system for video coding has been developed. The system is implemented in a high-performance 0.25 m logic/embedded DRAM process. It integr...
Markus Rudack, Dirk Niggemeyer