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» A Java processor architecture for embedded real-time systems
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129
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CODES
1999
IEEE
15 years 6 months ago
An ASIP design methodology for embedded systems
A well-known challenge during processor design is to obtain the best possible results for a typical target application domain that is generally described as a set of benchmarks. O...
Kayhan Küçükçakar
131
Voted
CODES
2002
IEEE
15 years 7 months ago
Communication speed selection for embedded systems with networked voltage-scalable processors
High-speed serial network interfaces are gaining wide use in connecting multiple processors and peripherals in modern embedded systems, thanks to their size advantage and power ef...
Jinfeng Liu, Pai H. Chou, Nader Bagherzadeh
SIGCSE
2009
ACM
161views Education» more  SIGCSE 2009»
15 years 7 months ago
An activity-based sensor networks course for undergraduates with sun spot devices
Wireless sensor networks are revolutionizing the instrumentation of the physical world, across scientific, industrial and military applications. In this paper, we describe our eff...
Damon Tyman, Nirupama Bulusu, Jens Mache
VLSID
2005
IEEE
102views VLSI» more  VLSID 2005»
16 years 2 months ago
Rapid Embedded Hardware/Software System Generation
This paper presents an RTL generation scheme for a SimpleScalar / PISA Instruction set architecture with system calls to implement C programs. The scheme utilizes ASIPmeister, a p...
Jorgen Peddersen, Seng Lin Shee, Andhi Janapsatya,...
CF
2009
ACM
15 years 9 months ago
Strategies for dynamic memory allocation in hybrid architectures
Hybrid architectures combining the strengths of generalpurpose processors with application-specific hardware accelerators can lead to a significant performance improvement. Our ...
Peter Bertels, Wim Heirman, Dirk Stroobandt