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CACM
2011
134views more  CACM 2011»
12 years 11 months ago
Brain-computer interfaces for communication and control
For many years people have speculated that electroencephalographic activity or other electrophysiological measures of brain function might provide a new non-muscular channel for s...
Dennis J. McFarland, Jonathan R. Wolpaw
EUROSYS
2010
ACM
14 years 4 months ago
A Comprehensive Scheduler for Asymmetric Multicore Systems
Symmetric-ISA (instruction set architecture) asymmetricperformance multicore processors were shown to deliver higher performance per watt and area for codes with diverse architect...
Juan Carlos Saez, Manuel Prieto Matias, Alexandra ...
CODES
2007
IEEE
14 years 2 months ago
Reliable multiprocessor system-on-chip synthesis
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of co...
Changyun Zhu, Zhenyu (Peter) Gu, Robert P. Dick, L...
LCTRTS
2007
Springer
14 years 1 months ago
Scratchpad allocation for data aggregates in superperfect graphs
Existing methods place data or code in scratchpad memory, i.e., SPM by either relying on heuristics or resorting to integer programming or mapping it to a graph coloring problem. ...
Lian Li 0002, Quan Hoang Nguyen, Jingling Xue
LCTRTS
2004
Springer
14 years 1 months ago
Spinach: a liberty-based simulator for programmable network interface architectures
This paper presents Spinach, a new simulator toolset specifically designed to target programmable network interface architectures. Spinach models both system components that are ...
Paul Willmann, Michael Brogioli, Vijay S. Pai
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