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» A Logic for Virtual Memory
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CGO
2005
IEEE
15 years 9 months ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...
ICS
1999
Tsinghua U.
15 years 8 months ago
Realizing the performance potential of the virtual interface architecture
The Virtual Interface (VI) Architecture provides protected userlevel communication with high delivered bandwidth and low permessage latency, particularly for small messages. The V...
Evan Speight, Hazim Abdel-Shafi, John K. Bennett
JAVA
1999
Springer
15 years 8 months ago
Interfacing Java to the Virtual Interface Architecture
User-level network interfaces (UNIs) have reduced the overheads of communication by exposing the buffers used by the network interface DMA engine to the applications. This removes...
Chi-Chao Chang, Thorsten von Eicken
VRML
2004
ACM
15 years 9 months ago
A VRML97-X3D extension for massive scenery management in virtual worlds
In this paper we present a VRML97-X3D extension to describe precomputed visibility relationships in the context of progressive transmission as well as real time visualization of m...
Jean-Eudes Marvie, Kadi Bouatouch
IPPS
1995
IEEE
15 years 7 months ago
Operating system support for concurrent remote task creation
This paper describes improvements to the Mach microkernel’s support for efficient application startup across multiple nodes in a cluster or massively parallel processor. Signifi...
Dejan S. Milojicic, David L. Black, Steven J. Sear...