Today's high-performance single-chip CMOS microprocessors are the most complex and challenging chip designs ever implemented. To stay on the leading edge, Digital's micro...
In this paper, we consider the problem of calculating the signal and transition probabilities of the internal nodes of the combinational logic part of a nite state machine (FSM). ...
In this paper we present a set cover based approach (SCP) to multi-way partitioning for minimum delay for Look-Up Table based FPGAs. SCP minimizes the number of chip-crossings on ...
Retiming has been proposed as an optimizationstep forsequential circuits represented at the net-list level. Retiming moves the latches across the logic gates and in doing so chang...
Vigyan Singhal, Carl Pixley, Richard L. Rudell, Ro...
Reactive systems are often described by interconnecting sub-components along architectural connectors defining communication policies. Generally, such global systems may exhibit p...