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» A MIPS R2000 implementation
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FCCM
2004
IEEE
152views VLSI» more  FCCM 2004»
13 years 11 months ago
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki...
WIOPT
2005
IEEE
14 years 1 months ago
An Interactive Transparent Protocol for Connection Oriented Mobility -- Performance Analysis with Voice Traffic
Loss-Free handoff in Mobile Networks is an extensive research area. Mobile IP (MIP) provided a solution to enable a mobile node to roam from one location to another while maintain...
Raid Zaghal, Sandeep Davu, Javed I. Khan
DATE
2010
IEEE
124views Hardware» more  DATE 2010»
14 years 1 months ago
Control network generator for latency insensitive designs
—Creating latency insensitive or asynchronous designs from clocked designs has potential benefits of increased modularity and robustness to variations. Several transformations h...
Eliyah Kilada, Kenneth S. Stevens
MST
2002
107views more  MST 2002»
13 years 7 months ago
A Comparison of Asymptotically Scalable Superscalar Processors
The poor scalability of existing superscalar processors has been of great concern to the computer engineering community. In particular, the critical-path lengths of many components...
Bradley C. Kuszmaul, Dana S. Henry, Gabriel H. Loh
PADL
2007
Springer
14 years 2 months ago
From Zinc to Design Model
We describe a preliminary implementation of the high-level modelling language Zinc. This language supports a modelling methodology in which the same Zinc model can be automatically...
Reza Rafeh, Maria J. García de la Banda, Ki...