Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...
Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I....
: - One of the main bottlenecks when designing a network processing system is very often its memory subsystem. This is mainly due to the state-of-the-art network links operating at...
Ioannis Papaefstathiou, Theofanis Orphanoudakis, G...
Abstract—Content-Centric Networking is a new communication architecture that rethinks the Internet communication model, designed for point-to-point connections between hosts, and...
Giovanna Carofiglio, Vinicius Gehlen, Diego Perino
We study the problem of tracking a moving device under two indoor location architectures: an active mobile architecture and a passive mobile architecture. In the former, the infra...
Adam Smith, Hari Balakrishnan, Michel Goraczko, Ni...
As a key approach to achieve energy efficiency in sensor networks, sensing coverage has been studied extensively. Researchers have designed many coverage protocols to provide vario...
Yu Gu, Joengmin Hwang, Tian He, David Hung-Chang D...