252 search results - page 23 / 51 » A Massively Parallel Architecture for Bioinformatics |
IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
While general-purpose processors have only recently employed chip multiprocessor (CMP) architectures, network processors (NPs) have used heterogeneous multi-core architectures sin...
ARC
2008
Springer
13 years 10 months ago
2008
Springer
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
WWW
2009
ACM
14 years 9 months ago
2009
ACM
Web search engines are facing formidable performance challenges as they need to process thousands of queries per second over billions of documents. To deal with this heavy workloa...
VLSISP
2002
13 years 8 months ago
2002
Abstract. This paper presents a reduced-complexity, fixed-point algorithm and efficient real-time VLSI architectures for multiuser channel estimation, one of the core baseband proc...
SBACPAD
2008
IEEE
14 years 2 months ago
2008
IEEE
This work presents an implementation of Neocognitron Neural Network, using a high performance computing architecture based on GPU (Graphics Processing Unit). Neocognitron is an ar...