Sciweavers

1957 search results - page 349 / 392
» A Maturity Model for the Implementation of Software Process ...
Sort
View
IWMM
2011
Springer
270views Hardware» more  IWMM 2011»
12 years 11 months ago
Memory management in NUMA multicore systems: trapped between cache contention and interconnect overhead
Multiprocessors based on processors with multiple cores usually include a non-uniform memory architecture (NUMA); even current 2-processor systems with 8 cores exhibit non-uniform...
Zoltan Majo, Thomas R. Gross
ISMIS
2009
Springer
14 years 3 months ago
Discovering Structured Event Logs from Unstructured Audit Trails for Workflow Mining
Workflow mining aims to find graph-based process models based on activities, emails, and various event logs recorded in computer systems. Current workflow mining techniques mainly ...
Liqiang Geng, Scott Buffett, Bruce Hamilton, Xin W...
ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
14 years 1 months ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
14 years 2 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
DSN
2006
IEEE
14 years 2 months ago
Assessment of the Effect of Memory Page Retirement on System RAS Against Hardware Faults
The Solaris 10 Operating System includes a number of new features for predictive self-healing. One such feature is the ability of the Fault Management software to diagnose memory ...
Dong Tang, Peter Carruthers, Zuheir Totari, Michae...