109 search results - page 6 / 22 » A Methodology for Large-Scale Hardware Verification |
DAC
1997
ACM
14 years 3 days ago
1997
ACM
We present our experiences with the formal verification of an automotive chip used to control the safety features in a car. We used a BDD based model checker in our work. We descr...
GLVLSI
2007
IEEE
14 years 13 days ago
2007
IEEE
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
DSD
2002
IEEE
14 years 1 months ago
2002
IEEE
In this paper we describe a methodology for the formal verification of a DSP chip using the HOL theorem prover. We used an iterative method to specify both the behavioral and stru...
CHARME
2003
Springer
14 years 6 days ago
2003
Springer
In formal verification, we verify that a system is correct with respect to a specification. Even when the system is proven to be correct, there is still a question of how complete ...
ASPDAC
2006
ACM
14 years 9 days ago
2006
ACM
