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» A Model Checker for AADL
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TCAD
2008
114views more  TCAD 2008»
13 years 9 months ago
Word-Level Predicate-Abstraction and Refinement Techniques for Verifying RTL Verilog
el Predicate Abstraction and Refinement Techniques for Verifying RTL Verilog Himanshu Jain, Daniel Kroening, Natasha Sharygina, and Edmund M. Clarke, Fellow, IEEE As a first step, ...
Himanshu Jain, Daniel Kroening, Natasha Sharygina,...
SPIN
2010
Springer
13 years 8 months ago
Combining SPIN with ns-2 for Protocol Optimization
In the field of communication networks, protocol engineers usually employ several tools focused on specific kinds of analysis, such as performance or correctness. This paper pres...
Pedro Merino, Alberto Salmeron
FASE
2004
Springer
14 years 3 months ago
Consistent Adaptation and Evolution of Class Diagrams during Refinement
Abstract. Software models are key in separating and solving independent development concerns. However, there is still a gap on how to transition design information among these sepa...
Alexander Egyed
POPL
2004
ACM
14 years 10 months ago
Abstractions from proofs
stractions from Proofs Ranjit Jhala1 Kenneth L. McMillan2 1 UC San Diego 2 Cadence Berkeley Laboratories We present a technique for using infeasible program paths to automatically ...
Thomas A. Henzinger, Ranjit Jhala, Rupak Majumdar,...
ICSE
2007
IEEE-ACM
14 years 10 months ago
Parallel Randomized State-Space Search
Model checkers search the space of possible program behaviors to detect errors and to demonstrate their absence. Despite major advances in reduction and optimization techniques, s...
Matthew B. Dwyer, Sebastian G. Elbaum, Suzette Per...