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EUROMICRO
2007
IEEE
14 years 23 days ago
Guiding Component-Based Hardware/Software Co-Verification with Patterns
In component-based hardware/software co-verification, properties of an embedded system are established from properties of its hardware and software components. A major challenge i...
Juncao Li, Fei Xie, Huaiyu Liu
CODES
2006
IEEE
14 years 3 months ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
INTEGRATION
2007
98views more  INTEGRATION 2007»
13 years 8 months ago
Hashchip: A shared-resource multi-hash function processor architecture on FPGA
The ubiquitous presence of mobile devices and the demand for better performance and efficiency have motivated research into embedded implementations of cryptography algorithms. I...
T. S. Ganesh, Michael T. Frederick, T. S. B. Sudar...
TSE
1998
128views more  TSE 1998»
13 years 8 months ago
Modeling and Evaluating Design Alternatives for an On-Line Instrumentation System: A Case Study
—This paper demonstrates the use of a model-based evaluation approach for instrumentation systems (ISs). The overall objective of this study is to provide early feedback to tool ...
Abdul Waheed, Diane T. Rover, Jeffrey K. Hollingsw...
SAMOS
2010
Springer
13 years 7 months ago
Cycle-accurate performance modelling in an ultra-fast just-in-time dynamic binary translation instruction set simulator
—Instruction set simulators (ISS) are vital tools for compiler and processor architecture design space exploration and verification. State-of-the-art simulators using just-in-ti...
Igor Böhm, Björn Franke, Nigel P. Topham