Sciweavers

3629 search results - page 111 / 726
» A Network Memory Architecture Model and Performance Analysis
Sort
View
IPPS
2006
IEEE
14 years 3 months ago
Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures
In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...
Grigoris Dimitroulakos, Michalis D. Galanis, Const...
ISLPED
2005
ACM
108views Hardware» more  ISLPED 2005»
14 years 2 months ago
Replacing global wires with an on-chip network: a power analysis
This paper explores the power implications of replacing global chip wires with an on-chip network. We optimize network links by varying repeater spacing, link pipelining, and volt...
Seongmoo Heo, Krste Asanovic
MASCOTS
2004
13 years 10 months ago
Performance Modeling of Fully Adaptive Wormhole Routing in 2-D Mesh-Connected Multiprocessors
Several models of deterministic routing have been proposed for wormhole-routed mesh networks while there is only one model, to our best knowledge, proposed for fully adaptive worm...
Hashem Hashemi Najaf-abadi, Hamid Sarbazi-Azad, P....
IPPS
1998
IEEE
14 years 22 days ago
Performance Range Comparison via Crossing Point Analysis
Parallel programming is elusive. The relative performance of di erent parallel implementations varies with machine architecture, system and problem size. How to compare di erent i...
Xian-He Sun
WOSP
2004
ACM
14 years 2 months ago
Application performance on the Direct Access File System
The Direct Access File System (DAFS) is a distributed file system built on top of direct-access transports (DAT). Direct-access transports are characterized by using remote direct...
Alexandra Fedorova, Margo I. Seltzer, Kostas Magou...