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» A Network Memory Architecture Model and Performance Analysis
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ICS
2005
Tsinghua U.
14 years 2 months ago
A heterogeneously segmented cache architecture for a packet forwarding engine
As network traffic continues to increase and with the requirement to process packets at line rates, high performance routers need to forward millions of packets every second. Eve...
Kaushik Rajan, Ramaswamy Govindarajan
INDOCRYPT
2009
Springer
14 years 3 months ago
Towards Secure and Practical MACs for Body Sensor Networks
Wireless sensor network (WSN) commonly requires lower level security for public information gathering, whilst body sensor network (BSN) must be secured with strong authenticity to...
Zheng Gong, Pieter H. Hartel, Svetla Nikova, Bo Zh...
UMC
2000
14 years 23 days ago
In-vitro Transcriptional Circuits
The structural similarity of neural networks and genetic regulatory networks to digital circuits, and hence to each other, was noted from the very beginning of their study [1, 2]....
Erik Winfree
MICRO
2008
IEEE
162views Hardware» more  MICRO 2008»
13 years 9 months ago
MetaTM/TxLinux: Transactional Memory for an Operating System
This paper quantifies the effect of architectural design decisions on the performance of TxLinux. TxLinux is a Linux kernel modified to use transactions in place of locking primit...
Hany E. Ramadan, Christopher J. Rossbach, Donald E...
GLOBECOM
2006
IEEE
14 years 3 months ago
Further Analysis of XCP Equilibrium Performance
— Low analyzes the equilibrium performance of the recently developed eXplicit Control Protocol (XCP) by applying the derived window-based dynamical model. However, Low’s window...
Peng Wang, David L. Mills