3629 search results - page 174 / 726 » A Network Memory Architecture Model and Performance Analysis |
CONEXT
2008
ACM
13 years 11 months ago
2008
ACM
Modern commodity hardware architectures, with their multiple multi-core CPUs and high-speed system interconnects, exhibit tremendous power. In this paper, we study performance lim...
EUROPAR
1998
Springer
14 years 1 months ago
1998
Springer
This paper illustrates the use of a post-mortem call-graph profiling tool in the analysis of an SQL query processing application written using BSPIib [4]. Unlike other parallel pro...
IJCNN
2007
IEEE
14 years 3 months ago
2007
IEEE
–The performability of disk arrays systems has been studied before. However, in the case of imprecise data, a fuzzy model can be the base for the performability analysis. This pa...
IPPS
2006
IEEE
14 years 3 months ago
2006
IEEE
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...
ICC
2009
IEEE
14 years 4 months ago
2009
IEEE
—We consider a new generation of COTS Software Routers (SRs), able to effectively exploit multi-Core/CPU HW platforms. Our main objective is to evaluate and to model the impact o...