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» A Network Memory Architecture Model and Performance Analysis
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VLSID
2004
IEEE
107views VLSI» more  VLSID 2004»
14 years 8 months ago
Performance Analysis of Inter Cluster Communication Methods in VLIW Architecture
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
Sourabh Saluja, Anshul Kumar
WOSP
2004
ACM
14 years 1 months ago
Experimenting different software architectures performance techniques: a case study
In this paper we describe our experience in performance analysis of the software architecture of the NICE case study which is responsible for providing several secure communicatio...
Simonetta Balsamo, Moreno Marzolla, Antinisca Di M...
ISPAN
2000
IEEE
14 years 3 days ago
Versatile Processor Design for Efficiency and High Performance
We present new architectural concepts for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2 -CPU (Data-Driven processor) follows the natura...
Sotirios G. Ziavras
JSAC
2006
172views more  JSAC 2006»
13 years 7 months ago
A Memory-Efficient Parallel String Matching Architecture for High-Speed Intrusion Detection
The ability to inspect both packet headers and payloads to identify attack signatures makes network intrusion detection system (NIDS) a promising approach to protect Internet syste...
Hongbin Lu, Kai Zheng, Bin Liu, Xin Zhang, Y. Liu
ISPASS
2010
IEEE
14 years 2 months ago
Demystifying GPU microarchitecture through microbenchmarking
—Graphics processors (GPU) offer the promise of more than an order of magnitude speedup over conventional processors for certain non-graphics computations. Because the ften prese...
Henry Wong, Misel-Myrto Papadopoulou, Maryam Sadoo...