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» A Network Memory Architecture Model and Performance Analysis
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ANNS
2007
13 years 9 months ago
An improved architecture for cooperative and comparative neurons (CCNs) in neural network
The ability to store and retrieve information is critical in any type of neural network. In neural network, the memory particularly associative memory, can be defined as the one i...
Md. Kamrul Islam
LCTRTS
2004
Springer
14 years 1 months ago
Spinach: a liberty-based simulator for programmable network interface architectures
This paper presents Spinach, a new simulator toolset specifically designed to target programmable network interface architectures. Spinach models both system components that are ...
Paul Willmann, Michael Brogioli, Vijay S. Pai
DATE
2008
IEEE
158views Hardware» more  DATE 2008»
14 years 2 months ago
Performance Analysis of SoC Architectures Based on Latency-Rate Servers
This paper presents a method for static performance analysis of SoC architectures. The method is based on a network calculus theory known as LR servers. This network calculus is e...
Jelte Peter Vink, Kees van Berkel, Pieter van der ...
ESTIMEDIA
2007
Springer
14 years 1 months ago
Network Calculus Applied to Verification of Memory Access Performance in SoCs
SoCs for multimedia applications typically use only one port to off-chip DRAM for cost reasons. The sharing of interconnect and the off-chip DRAM port by several IP blocks makes t...
Tomas Henriksson, Pieter van der Wolf, Axel Jantsc...
PAAPP
2006
141views more  PAAPP 2006»
13 years 7 months ago
Algorithmic optimizations of a conjugate gradient solver on shared memory architectures
OpenMP is an architecture-independent language for programming in the shared memory model. OpenMP is designed to be simple and in terms of programming abstractions. Unfortunately,...
Henrik Löf, Jarmo Rantakokko