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» A Network Memory Architecture Model and Performance Analysis
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DAC
2009
ACM
16 years 4 months ago
Designing heterogeneous ECU networks via compact architecture encoding and hybrid timing analysis
In this paper, a design method for automotive architectures is proposed. The two main technical contributions are (i) a novel hardware/software architecture encoding that unifies ...
Jürgen Teich, Martin Lukasiewycz, Michael Gla...
ICDCSW
2009
IEEE
15 years 1 months ago
Performance Analysis of WiMedia UWB MAC
Ultra Wide Band (UWB) technologies have attracted a lot of attention recently due to their large bandwidth and low emission, which are suitable for in-door, high-speed multimedia c...
Rukhsana Ruby, Jianping Pan
ASAP
2005
IEEE
169views Hardware» more  ASAP 2005»
15 years 9 months ago
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...
MSWIM
2005
ACM
15 years 9 months ago
Performance analysis of differentiated ARQ scheme for video transmission over wireless networks
The Advance in video coding and wireless communication techniques has enabled video-based services to be the most important component of many emerging multimedia applications. The...
Fen Hou, Pin-Han Ho, Yongbing Zhang
RTAS
2005
IEEE
15 years 9 months ago
Timing Analysis for Sensor Network Nodes of the Atmega Processor Family
Low-end embedded architectures, such as sensor nodes, have become popular in diverse fields, many of which impose real-time constraints. Currently, the Atmel Atmega processor fam...
Sibin Mohan, Frank Mueller, David B. Whalley, Chri...