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» A Network Memory Architecture Model and Performance Analysis
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HICSS
2005
IEEE
127views Biometrics» more  HICSS 2005»
14 years 2 months ago
Enterprise Architecture Analysis with XML
This paper shows how XML can be used for static and dynamic analysis of architectures. Our analysis is based on the distinction between symbolic and semantic models of architectur...
Frank S. de Boer, Marcello M. Bonsangue, Joost Jac...
CODES
2009
IEEE
14 years 1 months ago
Cycle count accurate memory modeling in system level design
In this paper, we propose an effective automatic generation approach for a Cycle-Count Accurate Memory Model (CCAMM) from the Clocked Finite State Machine (CFSM) of the Cycle Accu...
Yi-Len Lo, Mao Lin Li, Ren-Song Tsay
IPPS
2006
IEEE
14 years 3 months ago
Parallelization of module network structure learning and performance tuning on SMP
As an extension of Bayesian network, module network is an appropriate model for inferring causal network of a mass of variables from insufficient evidences. However learning such ...
Hongshan Jiang, Chunrong Lai, Wenguang Chen, Yuron...
ITNG
2007
IEEE
14 years 3 months ago
On Design and Analysis of a Feasible Network-on-Chip (NoC) Architecture
In this paper, we present several enhanced network techniques which are appropriate for VLSI implementation and have reduced complexity, high throughput, and simple routing algori...
Jun Ho Bahn, Seung Eun Lee, Nader Bagherzadeh
ICIP
2007
IEEE
14 years 10 months ago
Analysis and Integrated Architecture Design for Overlap Smooth and in-Loop Deblocking Filter in VC-1
Unlike familiar macroblock-based in-loop deblocking filter in H.264, the filters of VC-1 perform all horizontal edges (for in-loop deblocking filtering) or vertical edges (for ove...
Yen-Lin Lee, Truong Nguyen