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» A New Approach to Pipeline FFT Processor
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DAC
2009
ACM
14 years 9 months ago
Handling don't-care conditions in high-level synthesis and application for reducing initialized registers
Don't-care conditions provide additional flexibility in logic synthesis and optimization. However, most work only focuses on the gate level because it is difficult to handle ...
Hong-Zu Chou, Kai-Hui Chang, Sy-Yen Kuo
IPPS
2010
IEEE
13 years 6 months ago
Inter-block GPU communication via fast barrier synchronization
The graphics processing unit (GPU) has evolved from a fixedfunction processor with programmable stages to a programmable processor with many fixed-function components that deliver...
Shucai Xiao, Wu-chun Feng
SC
2005
ACM
14 years 2 months ago
Scalable Parallel Octree Meshing for TeraScale Applications
We present a new methodology for generating and adapting octree meshes for terascale applications. Our approach combines existing methods, such as parallel octree decomposition and...
Tiankai Tu, David R. O'Hallaron, Omar Ghattas
IPPS
2005
IEEE
14 years 2 months ago
A Dependency Chain Clustered Microarchitecture
In this paper we explore a new clustering approach for reducing the complexity of wide issue in-order processors based on EPIC architectures. Complexity effectiveness is achieved ...
Satish Narayanasamy, Hong Wang 0003, Perry H. Wang...
VLSI
2010
Springer
13 years 6 months ago
Synchronous elasticization: Considerations for correct implementation and MiniMIPS case study
—Latency insensitivity is a promising design paradigm in the nanometer era since it has potential benefits of increased modularity and robustness to variations. Synchronous elas...
Eliyah Kilada, Shomit Das, Kenneth S. Stevens