This paper presents a novel synthesis algorithm that reduces the area needed for implementing multiplexers on an FPGA by an average of 18%. This is achieved by reducing the number...
Abstract. A new realization of a space-efficient deque is presented. The data structure is constructed from three singly resizable arrays, each of which is a blockwiseallocated pil...
We present a new approach to implementing real-time transactions on memory-resident data on sharedmemory multiprocessors. This approach allows hard deadlines to be supported witho...
James H. Anderson, Rohit Jain, Srikanth Ramamurthy
This paper describes a new hardware algorithm for morpheme extraction and its implementation on a specific machine (MEX-I), as the first step toward achieving natural language par...
In this paper, we propose two new support vector approaches for ordinal regression, which optimize multiple thresholds to define parallel discriminant hyperplanes for the ordinal ...