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IPPS
1999
IEEE
13 years 11 months ago
Reducing I/O Complexity by Simulating Coarse Grained Parallel Algorithms
Block-wise access to data is a central theme in the design of efficient external memory (EM) algorithms. A second important issue, when more than one disk is present, is fully par...
Frank K. H. A. Dehne, David A. Hutchinson, Anil Ma...
ACMMSP
2004
ACM
101views Hardware» more  ACMMSP 2004»
14 years 28 days ago
Metrics and models for reordering transformations
Irregular applications frequently exhibit poor performance on contemporary computer architectures, in large part because of their inefficient use of the memory hierarchy. Runtime ...
Michelle Mills Strout, Paul D. Hovland
LAWEB
2004
IEEE
13 years 8 months ago
Integrating Semantic Concept Similarity in Model-Based Web Applications
Model-based design methods, and model-based architectures, have gained adoption in authoring applications for the WWW. This is further reinforced by the increasing visibility of t...
Cristiano Rocha, Daniel Schwabe, Marcus Poggi de A...
INFOCOM
2010
IEEE
13 years 4 months ago
A Greedy Link Scheduler for Wireless Networks with Gaussian Multiple Access and Broadcast Channels
Information theoretic Broadcast Channels (BC) and Multiple Access Channels (MAC) enable a single node to transmit data simultaneously to multiple nodes, and multiple nodes to trans...
Arun Sridharan, Can Emre Koksal, Elif Uysal-Biyiko...
DAC
2006
ACM
14 years 8 months ago
Architecture-aware FPGA placement using metric embedding
Since performance on FPGAs is dominated by the routing architecture rather than wirelength, we propose a new architecture-aware approach to initial FPGA placement that models the ...
Padmini Gopalakrishnan, Xin Li, Lawrence T. Pilegg...