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MICRO
2000
IEEE
133views Hardware» more  MICRO 2000»
13 years 12 months ago
Compiler controlled value prediction using branch predictor based confidence
Value prediction breaks data dependencies in a program thereby creating instruction level parallelism that can increase program performance. Hardware based value prediction techni...
Eric Larson, Todd M. Austin
MEMOCODE
2010
IEEE
13 years 5 months ago
Feldspar: A domain specific language for digital signal processing algorithms
A new language, Feldspar, is presented, enabling high-level and platform-independent description of digital signal processing (DSP) algorithms. Feldspar is a pure functional langua...
Emil Axelsson, Koen Claessen, Gergely Dévai...
INFOCOM
2009
IEEE
14 years 2 months ago
Physical Interference Modeling for Transmission Scheduling on Commodity WiFi Hardware
—The demand for capacity in WiFi networks is driving a new look at transmission scheduling based link layers, particularly in the context of mesh networks. One basic issue here i...
Ritesh Maheshwari, Jing Cao, Samir R. Das
GECCO
2005
Springer
140views Optimization» more  GECCO 2005»
14 years 1 months ago
CGP visits the Santa Fe trail: effects of heuristics on GP
GP uses trees to represent chromosomes. The user defines the representation space by defining the set of functions and terminals to label the nodes in the trees, and GP searches t...
Cezary Z. Janikow, Christopher J. Mann
GECCO
2003
Springer
129views Optimization» more  GECCO 2003»
14 years 24 days ago
Inherent Fault Tolerance in Evolved Sorting Networks
This poster paper summarizes our research on fault tolerance arising as a by-product of the evolutionary computation process. Past research has shown evidence of robustness emergin...
Rob Shepherd, James A. Foster