945 search results - page 47 / 189 » A New Method for Design of Robust Digital Circuits |
DATE
2000
IEEE
14 years 1 months ago
2000
IEEE
An objective of DSP testing should be to ensure that any errors due to missed faults are infrequent compared to a circuit’s intrinsic errors, such as overflow. A method is prop...
DAC
2005
ACM
13 years 11 months ago
2005
ACM
Capturing RLCK circuit responses accurately with existing model order reduction (MOR) techniques is very expensive. Direct metrics for fast analysis of RC circuits exist but there...
IJCAI
2001
13 years 10 months ago
2001
This paper presents a method for designing bundles in a combinatorial auction protocol that is robust against false-name bids. Internet auctions have become an integral part of El...
BMCBI
2006
13 years 9 months ago
2006
Background: In binary high-throughput screening projects where the goal is the identification of low-frequency events, beyond the obvious issue of efficiency, false positives and ...
ECCTD
2011
12 years 8 months ago
2011
⎯ Technology scaling is in the era where the chip performance is constrained by its power dissipation. Although the power limits vary with the application domain, they dictate th...