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» A New Method for Design of Robust Digital Circuits
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GLVLSI
2010
IEEE
209views VLSI» more  GLVLSI 2010»
14 years 2 months ago
Enhancing debugging of multiple missing control errors in reversible logic
Researchers are looking for alternatives to overcome the upcoming limits of conventional hardware technologies. Reversible logic thereby established itself as a promising directio...
Jean Christoph Jung, Stefan Frehse, Robert Wille, ...
ICIP
2010
IEEE
13 years 7 months ago
Stochastic gradient descent for robust inverse photomask synthesis in optical lithography
Optical lithography is a critical step in the semiconductor manufacturing process, and one key problem is the design of the photomask for a particular circuit pattern, given the o...
Ningning Jia, Edmund Y. Lam
DAC
2007
ACM
14 years 10 months ago
MP-trees: A Packing-Based Macro Placement Algorithm for Mixed-Size Designs
In this paper, we present a new multi-packing tree (MP-tree) representation for macro placement to handle mixed-size designs. Based on binary trees, the MP-tree is very efficient,...
Tung-Chieh Chen, Ping-Hung Yuh, Yao-Wen Chang, Fwu...
ISPD
2006
ACM
108views Hardware» more  ISPD 2006»
14 years 3 months ago
Statistical clock tree routing for robustness to process variations
Advances in VLSI technology make clock skew more susceptible to process variations. Notwithstanding efficient zero skew routing algorithms, clock skew still limits post-manufactu...
Uday Padmanabhan, Janet Meiling Wang, Jiang Hu
GECCO
2006
Springer
215views Optimization» more  GECCO 2006»
14 years 21 days ago
A multi-chromosome approach to standard and embedded cartesian genetic programming
Embedded Cartesian Genetic Programming (ECGP) is an extension of Cartesian Genetic Programming (CGP) that can automatically acquire, evolve and re-use partial solutions in the for...
James Alfred Walker, Julian Francis Miller, Rachel...