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» A New Method for Design of Robust Digital Circuits
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ICML
2006
IEEE
14 years 10 months ago
Nightmare at test time: robust learning by feature deletion
When constructing a classifier from labeled data, it is important not to assign too much weight to any single input feature, in order to increase the robustness of the classifier....
Amir Globerson, Sam T. Roweis
AVBPA
2001
Springer
146views Biometrics» more  AVBPA 2001»
14 years 22 days ago
Robust Face Detection Using the Hausdorff Distance
Abstract. The localization of human faces in digital images is a fundamental step in the process of face recognition. This paper presents a shape comparison approach to achieve fas...
Oliver Jesorsky, Klaus J. Kirchberg, Robert Frisch...
IJCNN
2006
IEEE
14 years 3 months ago
In Situ Training of CMOL CrossNets
—— Hybrid semiconductor/nanodevice (“CMOL”) technology may allow the implementation of digital and mixed-signal integrated circuits, including artificial neural networks (...
Jung Hoon Lee, Konstantin Likharev
ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
14 years 2 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
COMPLIFE
2005
Springer
14 years 2 months ago
Robust Perron Cluster Analysis for Various Applications in Computational Life Science
In the present paper we explain the basic ideas of Robust Perron Cluster Analysis (PCCA+) and exemplify the different application areas of this new and powerful method. Recently, ...
Marcus Weber, Susanna Kube