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» A New Method for Design of Robust Digital Circuits
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WCE
2007
13 years 10 months ago
A Graph-based Framework for High-level Test Synthesis
Improving testability during the early stages of High-level synthesis has several advantages including reduced test hardware overhead and design iterations. Recently, BIST techniq...
Ali Pourghaffari bashari, Saadat Pourmozafari
JCDL
2003
ACM
160views Education» more  JCDL 2003»
14 years 2 months ago
Automatic Document Metadata Extraction Using Support Vector Machines
Automatic metadata generation provides scalability and usability for digital libraries and their collections. Machine learning methods offer robust and adaptable automatic metadat...
Hui Han, C. Lee Giles, Eren Manavoglu, Hongyuan Zh...
HUC
2003
Springer
14 years 2 months ago
RightSPOT: A Novel Sense of Location for a Smart Personal Object
Abstract. One of the main prerequisites for location-based services is knowledge of location. We present a simple algorithm for computing the location of a device based on signal s...
John Krumm, Gerry Cermak, Eric Horvitz
SENSYS
2004
ACM
14 years 2 months ago
Hardware design experiences in ZebraNet
The enormous potential for wireless sensor networks to make a positive impact on our society has spawned a great deal of research on the topic, and this research is now producing ...
Pei Zhang, Christopher M. Sadler, Stephen A. Lyon,...
ASPDAC
2007
ACM
132views Hardware» more  ASPDAC 2007»
14 years 1 months ago
Fast Decoupling Capacitor Budgeting for Power/Ground Network Using Random Walk Approach
- This paper proposes a fast and practical decoupling capacitor (decap) budgeting algorithm to optimize the power ground (P/G) network design. The new method adopts a modified rand...
Le Kang, Yici Cai, Yi Zou, Jin Shi, Xianlong Hong,...