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HPDC
1998
IEEE
13 years 11 months ago
Strings: A High-Performance Distributed Shared Memory for Symmetrical Multiprocessor Clusters
This paper introduces Strings, a high performance distributed shared memory system designed for clusters of symmetrical multiprocessors (SMPs). The distinguishing feature of this ...
Sumit Roy, Vipin Chaudhary
PPOPP
2003
ACM
14 years 22 days ago
User-controllable coherence for high performance shared memory multiprocessors
In programming high performance applications, shared address-space platforms are preferable for fine-grained computation, while distributed address-space platforms are more suita...
Collin McCurdy, Charles N. Fischer
ARVLSI
1997
IEEE
151views VLSI» more  ARVLSI 1997»
13 years 11 months ago
The Hierarchical Multi-Bank DRAM: A High-Performance Architecture for Memory Integrated with Processors
A microprocessor integrated with DRAM on the same die has the potential to improve system performance by reducing the memory latency and improving the memory bandwidth. However, a...
Tadaaki Yamauchi, Lance Hammond, Kunle Olukotun
SC
1995
ACM
13 years 11 months ago
A Performance Evaluation of the Convex SPP-1000 Scalable Shared Memory Parallel Computer
The Convex SPP-1000 is the first commercial implementation of a new generation of scalable shared memory parallel computers with full cache coherence. It employs a hierarchical s...
Thomas L. Sterling, Daniel Savarese, Peter MacNeic...
MICRO
1997
IEEE
79views Hardware» more  MICRO 1997»
13 years 11 months ago
On High-Bandwidth Data Cache Design for Multi-Issue Processors
Highly aggressive multi-issue processor designs of the past few years and projections for the next decade require that we redesign the operation of the cache memory system. The nu...
Jude A. Rivers, Gary S. Tyson, Edward S. Davidson,...