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SASP
2008
IEEE
153views Hardware» more  SASP 2008»
14 years 3 months ago
TRaX: A Multi-Threaded Architecture for Real-Time Ray Tracing
Ray tracing is a technique used for generating highly realistic computer graphics images. In this paper, we explore the design of a simple but extremely parallel, multi-threaded, ...
Josef B. Spjut, Solomon Boulos, Daniel Kopta, Erik...
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
14 years 1 months ago
A Powerful System Design Methodology Combining OCAPI and Handel-C for Concept Engineering
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
Klaus Buchenrieder, Andreas Pyttel, Alexander Sedl...
ICDCS
1995
IEEE
14 years 12 days ago
Implementing Sequentially Consistent Shared Objects Using Broadcast and Point-to-Point Communication
A distributed algorithm that implements a sequentially consistent collection of shared read/update objects using a combination of broadcast and point-to-point communication is pre...
Alan Fekete, M. Frans Kaashoek, Nancy A. Lynch
IPPS
2006
IEEE
14 years 2 months ago
Reducing the associativity and size of step caches in CRCW operation
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
M. Forsell
VLSISP
1998
128views more  VLSISP 1998»
13 years 8 months ago
A Low Power DSP Engine for Wireless Communications
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...
Ingrid Verbauwhede, Mihran Touriguian