509 search results - page 87 / 102 » A New Multiport Memory for High Performance Parallel Process... |
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
Snoopy cache coherence protocols broadcast requests to all nodes, reducing the latency of cache to cache transfer misses at the expense of increasing interconnect power. We propos...
APPINF
2003
13 years 9 months ago
2003
Whenever large homogeneous data structures need to be processed in a non-trivial way, e.g. in computational sciences, image processing, or system simulation, high-level array prog...
IDEAS
1999
IEEE
13 years 12 months ago
1999
IEEE
Decision support systems are important in leveraging information present in data warehouses in businesses like banking, insurance, retail and health-care among many others. The mu...
FPGA
2007
ACM
14 years 1 months ago
2007
ACM
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
AAECC
2007
Springer
13 years 7 months ago
2007
Springer
Abstract. We present new performance models and a new, more compact data structure for cache blocking when applied to the sparse matrixvector multiply (SpM×V) operation, y ← y +...