73 search results - page 5 / 15 » A New Pipelined Array Architecture for Signed Multiplication |
IPPS
2010
IEEE
13 years 4 months ago
2010
IEEE
Multi-pattern string matching remains a major performance bottleneck in network intrusion detection and anti-virus systems for high-speed deep packet inspection (DPI). Although Aho...
CTRSA
2001
Springer
13 years 11 months ago
2001
Springer
The results of fast implementations of all five AES final candidates using Virtex Xilinx Field Programmable Gate Arrays are presented and analyzed. Performance of several alternati...
CHES
2001
Springer
13 years 11 months ago
2001
Springer
Abstract. This work proposes a new elliptic curve processor architecture for the computation of point multiplication for curves defined over fields GF(p). This is a scalable arch...
WWW
2005
ACM
14 years 7 months ago
2005
ACM
Design of high performance Web servers has become a recent research thrust to meet the increasing demand of networkbased services. In this paper, we propose a new Web server archi...
ISCA
1998
IEEE
13 years 11 months ago
1998
IEEE
This paper investigates the placement of data and parity on redundant disk arrays. Declustered organizations have been traditionally used to achieve fast reconstruction of a faile...