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SIAMCOMP
2008
148views more  SIAMCOMP 2008»
13 years 6 months ago
The Combined Power of Conditions and Information on Failures to Solve Asynchronous Set Agreement
Abstract. To cope with the impossibility of solving agreement problems in asynchronous systems made up of n processes and prone to t process crashes, system designers tailor their ...
Achour Mostéfaoui, Sergio Rajsbaum, Michel ...
ATS
2004
IEEE
108views Hardware» more  ATS 2004»
13 years 11 months ago
Rapid and Energy-Efficient Testing for Embedded Cores
Conventional serial connection of internal scan chains brings the power and time penalty. A novel parallel core wrapper design (pCWD) approach is presented in this paper for reduc...
Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman ...
BWCCA
2010
13 years 2 months ago
Advanced Design Issues for OASIS Network-on-Chip Architecture
Network-on-Chip (NoC) architectures provide a good way of realizing efficient interconnections and largely alleviate the limitations of bus-based solutions. NoC has emerged as a so...
Kenichi Mori, Adam Esch, Abderazek Ben Abdallah, K...
DAGM
2009
Springer
13 years 5 months ago
Increasing the Dimension of Creativity in Rotation Invariant Feature Design Using 3D Tensorial Harmonics
Spherical harmonics are widely used in 3D image processing due to their compactness and rotation properties. For example, it is quite easy to obtain rotation invariance by taking t...
Henrik Skibbe, Marco Reisert, Olaf Ronneberger, Ha...
DELTA
2008
IEEE
14 years 2 months ago
Addressing Heterogeneous Bandwidth Requirements in Modified Fat-Tree Networks-on-Chips
— A novel approach for satisfying heterogeneous bandwidth requirements of clients connected using a modified Fat Tree network-on-chip is presented. The new approach allows the No...
A. Bouhraoua, M. E. Elrabaa