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IPPS
2006
IEEE
16 years 5 days ago
Exploiting processing locality through paging configurations in multitasked reconfigurable systems
FPGA chips in reconfigurable computer systems are used as malleable coprocessors where components of a hardware library of functions can be configured as needed. As the number of ...
T. Taher, Tarek A. El-Ghazawi
HPCA
2005
IEEE
15 years 11 months ago
Enterprise IT Trends and Implications for Architecture Research
The last decade has seen several changes in the structure and emphasis of enterprise IT systems. Specific infrastructure trends have included the emergence of large consolidated d...
Parthasarathy Ranganathan, Norman P. Jouppi
165
Voted
BMCBI
2008
138views more  BMCBI 2008»
15 years 6 months ago
Using neural networks and evolutionary information in decoy discrimination for protein tertiary structure prediction
Background: We present a novel method of protein fold decoy discrimination using machine learning, more specifically using neural networks. Here, decoy discrimination is represent...
Ching-Wai Tan, David T. Jones
176
Voted
CCS
2010
ACM
15 years 6 months ago
TASTY: tool for automating secure two-party computations
Secure two-party computation allows two untrusting parties to jointly compute an arbitrary function on their respective private inputs while revealing no information beyond the ou...
Wilko Henecka, Stefan Kögl, Ahmad-Reza Sadegh...
IEEESCC
2007
IEEE
16 years 13 days ago
Swift: Fast, Reliable, Loosely Coupled Parallel Computation
A common pattern in scientific computing involves the execution of many tasks that are coupled only in the sense that the output of one may be passed as input to one or more other...
Yong Zhao, Mihael Hategan, Ben Clifford, Ian T. Fo...