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» A Novel Superscalar Architecture for Fast DCT Implementation
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GLOBECOM
2006
IEEE
14 years 1 months ago
Fast Robust Hashing
Abstract— As stateful flow-aware services are becoming commonplace, distributed router architectures have to quickly assign packets being forwarded to service-specialized proces...
Manuel Urueña, David Larrabeiti, Pablo Serr...
ICCD
2006
IEEE
113views Hardware» more  ICCD 2006»
14 years 4 months ago
High-speed Factorization Architecture for Soft-decision Reed-Solomon Decoding
Reed-Solomon (RS) codes are among the most widely utilized error-correcting codes in modern communication and computer systems. Among the decoding algorithms of RS codes, the rece...
Xinmiao Zhang
DEXAW
2003
IEEE
164views Database» more  DEXAW 2003»
14 years 1 months ago
Towards an Open Service Architecture for Data Mining on the Grid
Across a wide variety of fields, huge datasets are being collected and accumulated at a dramatical pace. The datasets addressed by individual applications are very often heteroge...
Peter Brezany, Jürgen Hofer, Alexander Wö...
ISPDC
2010
IEEE
13 years 6 months ago
Resource-Aware Compiler Prefetching for Many-Cores
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...
George C. Caragea, Alexandros Tzannes, Fuat Keceli...
CF
2006
ACM
13 years 11 months ago
The potential of the cell processor for scientific computing
The slowing pace of commodity microprocessor performance improvements combined with ever-increasing chip power demands has become of utmost concern to computational scientists. As...
Samuel Williams, John Shalf, Leonid Oliker, Shoaib...