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» A Parallel Hardware Architecture for Image Feature Detection
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ICIP
2006
IEEE
16 years 5 months ago
An Architecture for Compressive Imaging
Compressive Sensing is an emerging field based on the revelation that a small group of non-adaptive linear projections of a compressible signal contains enough information for rec...
Michael B. Wakin, Jason N. Laska, Marco F. Duarte,...
SIGPLAN
2008
15 years 3 months ago
A parallel dynamic compiler for CIL bytecode
Multi-core technology is being employed in most recent high-performance architectures. Such architectures need specifically designed multi-threaded software to exploit all the pot...
Simone Campanoni, Giovanni Agosta, Stefano Crespi-...
72
Voted
ISCAS
2007
IEEE
119views Hardware» more  ISCAS 2007»
15 years 9 months ago
SiGe IC- based mm-wave imager
—Millimeter-wave radiation and detection offers the possibility of detecting concealed weapons. Passive imaging measures the mm-wave radiation emitted from target objects. A pass...
Helen Kim, Sean Duffy, Jeff Herd, Charles Sodini
113
Voted
CORR
2008
Springer
64views Education» more  CORR 2008»
15 years 3 months ago
An adaptive embedded architecture for real-time Particle Image Velocimetry algorithms
Particle Image Velocimetry (PIV) is a method of imaging and analysing fields of flows. The PIV techniques compute and display all the motion vectors of the field in a resulting im...
Alain Aubert, Nathalie Bochard, Virginie Fresse
CAMP
2005
IEEE
15 years 9 months ago
Development of a Bit-Level Compiler for Massively Parallel Vision Chips
Abstract— An image sensor in which each pixel has a processing element is called a vision chip. The vision chip can perform real-time visual processing at a high frame rate of 10...
Takashi Komuro, Shingo Kagami, Masatoshi Ishikawa,...