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» A Parallel Hardware Architecture for Image Feature Detection
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SOSP
2009
ACM
14 years 5 months ago
RouteBricks: exploiting parallelism to scale software routers
We revisit the problem of scaling software routers, motivated by recent advances in server technology that enable highspeed parallel processing—a feature router workloads appear...
Mihai Dobrescu, Norbert Egi, Katerina J. Argyraki,...
ESANN
2003
13 years 10 months ago
VLSI Realization of a Two-Dimensional Hamming Distance Comparator ANN for Image Processing Applications
This paper presents the hardware realization of a Hamming artificial neural network, and demonstrates its use in a high-speed precision alignment system. High degree of parallelism...
Stéphane Badel, Alexandre Schmid, Yusuf Leb...
FPL
2008
Springer
124views Hardware» more  FPL 2008»
13 years 10 months ago
Direct sigma-delta modulated signal processing in FPGA
The effectiveness of implementing bit-stream signal processing (BSSP) multiplier circuits in FPGAs, in terms of hardware resources and clock frequency, is presented. In particular...
Chiu-Wah Ng, Ngai Wong, Hayden Kwok-Hay So, Tung-S...
IPPS
2000
IEEE
14 years 1 months ago
MAJC-5200: A High Performance Microprocessor for Multimedia Computing
The newly introduced Microprocessor Architecture for Java Computing MAJC supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruct...
Subramania Sudharsanan
ICCV
2005
IEEE
14 years 2 months ago
Contour-Based Learning for Object Detection
We present a novel categorical object detection scheme that uses only local contour-based features. A two-stage, partially supervised learning architecture is proposed: a rudiment...
Jamie Shotton, Andrew Blake, Roberto Cipolla