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ISLPED
2006
ACM
105views Hardware» more  ISLPED 2006»
14 years 1 months ago
Reducing power through compiler-directed barrier synchronization elimination
Interprocessor synchronization, while extremely important for ensuring execution correctness, can be very costly in terms of both power and performance overheads. Unfortunately, m...
Mahmut T. Kandemir, Seung Woo Son
IEEEPACT
2009
IEEE
13 years 5 months ago
Adaptive Locks: Combining Transactions and Locks for Efficient Concurrency
Transactional memory is being advanced as an alternative to traditional lock-based synchronization for concurrent programming. Transactional memory simplifies the programming mode...
Takayuki Usui, Reimer Behrends, Jacob Evans, Yanni...
BIBE
2007
IEEE
150views Bioinformatics» more  BIBE 2007»
14 years 1 months ago
Differential Scoring for Systolic Sequence Alignment
Systolic implementations of dynamic programming solutions that utilize a similarity matrix can achieve appreciable performance with both course- and fine-grain parallelization. A ...
Antonio E. de la Serna
SIGMOD
2008
ACM
140views Database» more  SIGMOD 2008»
14 years 7 months ago
Relational joins on graphics processors
We present a novel design and implementation of relational join algorithms for new-generation graphics processing units (GPUs). The most recent GPU features include support for wr...
Bingsheng He, Ke Yang, Rui Fang, Mian Lu, Naga K. ...
CONCURRENCY
2000
83views more  CONCURRENCY 2000»
13 years 7 months ago
Javia: A Java interface to the virtual interface architecture
The Virtual Interface (VI) architecture has become the industry standard for user-level network interfaces. This paper presents the implementation and evaluation of Javia, a Java ...
Chi-Chao Chang, Thorsten von Eicken