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» A Parallel Packet Screen for High Speed Networks
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ANCS
2006
ACM
13 years 11 months ago
Efficient memory utilization on network processors for deep packet inspection
Deep Packet Inspection (DPI) refers to examining both packet header and payload to look for predefined patterns, which is essential for network security, intrusion detection and c...
Piti Piyachon, Yan Luo
ICNP
2009
IEEE
13 years 5 months ago
A Mismatch Controller for Implementing High-Speed Rate-based Transport Protocols
End-to-end rate-based congestion control algorithms are advocated for audio/video transport over the Internet instead of window-based protocols. Once the congestion controller has ...
Luca De Cicco, Saverio Mascolo
GLVLSI
2005
IEEE
132views VLSI» more  GLVLSI 2005»
14 years 1 months ago
FPGA implementation of a modular and pipelined WF scheduler for high speed OC192 networks
In this paper we propose an FPGA implementation of a multi protocol Weighted Fair (WF) queuing algorithm able to handle variable length packets targeted for Packet Over Sonet (POS...
Abdallah Merhebi, Otmane Aït Mohamed
INFOCOM
2006
IEEE
14 years 1 months ago
JetMax: Scalable Max-Min Congestion Control for High-Speed Heterogeneous Networks
Recent surge of interest towards congestion control that relies on single-link feedback (e.g., XCP, RCP, MaxNet, EMKC, VCP), suggests that such systems may offer certain benefit...
Yueping Zhang, Derek Leonard, Dmitri Loguinov
VECPAR
2004
Springer
14 years 27 days ago
Message Strip-Mining Heuristics for High Speed Networks
In this work we investigate how the compiler technique of message strip mining performs in practice on contemporary high performance networks. Message strip mining attempts to redu...
Costin Iancu, Parry Husbands, Wei Chen