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SIAMSC
2011
140views more  SIAMSC 2011»
12 years 10 months ago
A Fast Parallel Algorithm for Selected Inversion of Structured Sparse Matrices with Application to 2D Electronic Structure Calcu
Abstract. An efficient parallel algorithm is presented and tested for computing selected components of H−1 where H has the structure of a Hamiltonian matrix of two-dimensional la...
Lin Lin, Chao Yang, Jianfeng Lu, Lexing Ying, Wein...
IPPS
2010
IEEE
13 years 5 months ago
Improving application performance with hardware data structures
Contemporary processors are becoming wider and more parallel. Thus developers must work hard to extract performance gains. An alternative computing paradigm is to use FPGA technolo...
Ravikesh Chandra, Oliver Sinnen
RSA
2006
144views more  RSA 2006»
13 years 7 months ago
Data structures with dynamical random transitions
We present a (non-standard) probabilistic analysis of dynamic data structures whose sizes are considered as dynamic random walks. The basic operations (insertion, deletion, positi...
Clément Dombry, Nadine Guillotin-Plantard, ...
IPPS
2000
IEEE
13 years 11 months ago
Switch Scheduling in the Multimedia Router (MMR)
The primary goal of the Multimedia Router (MMR) project is the design and implementation of a router optimized for multimedia applications. The router is targeted for use in clust...
Damon S. Love, Sudhakar Yalamanchili, José ...
FCCM
2003
IEEE
96views VLSI» more  FCCM 2003»
14 years 21 days ago
Data Search and Reorganization Using FPGAs: Application to Spatial Pointer-based Data Structures
FPGAs have appealing features such as customizable internal and external bandwidth and the ability to exploit vast amounts of fine-grain parallelism. In this paper we explore the ...
Pedro C. Diniz, Joonseok Park